Important Questions in Digital electronics 147302 subject for NOV/DEC 2011 ANNA UNIVERSITY OF TECHNOLOGY EXAMINATIONS FOR SECOND YEAR THIRD SEMESTER ECE Students

147302 - Digital electronics

UNIT I

1.      Obtain the standard  POS for f(A,B,C ) = (A+B ) (B+C)(A+ C)
2.      Simplify the following Boolean function by Quine Mc cluskey method
F(A,B,C,D)= ∑(0,2,3,6,7,8,10,12,13)
3.      Reduce the following function suing K- map
F(A,B,C,D)= π (0,3,4,7,8,10,12,14) + d(2,6)
4.      Using Quine Mc cluskey method to simplify the Boolean expression
F(A,B,C,D,E) = ∑ m (0,1,4,5,16,17,21,25,29)
5.      Using K –map  method obtain the minimal SOP and POS expressions
for the function F(W,X,Y,Z) = ∑ m (1,3,4,5,6,7,9,12,13)

UNIT II
1.    Design a excess 3 to BCD code convertor
2.    Design a combinational circuit that generates the 9’s complement of a BCD digit
3.    Design a seven segment decoder circuit to display the numbers 0 to 3
4.    Realize F(W,X,Y,Z) = ∑ m (1,4,6,7,8,9,10,11,15) using 4 to 1 MUX
5.    Explain the operation of carry look ahead adder with neat diagram

UNIT III

1.    Explain the operation of universal shift register with neat block diagram
2.    With a neat state diagram and logic diagram ,design and explain the sequence of  states of BCD counter
3.    Explain in detail the operation of 4 bit ripple counter
4.    How will you convert a D flip flop into JK flip flop

UNIT IV
1.    Design a combinational circuit using a ROM .The circuit accepts a three bit number and outputs a  binary number equal to the square of the input number
2.    Explain read and write operation of memory with timing waveforms
3.    A combinational circuit is defined by functions F1(A,B,C) =∑ M(0,1,6,7)
F2(A,B,C) =∑ M(2,3,5,7)

Implement the circuit with a PLA having three inputs , three product terms and twoinputs
4.    Write a note on RAM

UNIT V

1.    Describe the hazards that could occur in asynchronous sequential circuits. What are the ways in which they are eliminated
2.    Design negative edge triggered   T flip flop from logic gates
3.    Write a verilog coding for full adder
4.    Give hazard free realization for the following Boolean function
F(A,B,C,D)= ∑ m (1,3,6,7,13,15)

Important Questions in Digital electronics 147302 subject for NOV/DEC 2011 ANNA UNIVERSITY OF TECHNOLOGY EXAMINATIONS FOR SECOND YEAR THIRD SEMESTER ECE Students Reviewed by Rejin Paul on 5:51 AM Rating: 5