Tuesday, May 1, 2012

SOFTWARE ENGINEERING AND QUALITY ASSURANCE SEQA IMPORTANT QUESTIONS FOR APRIL/MAY 2012 ANNA UNIVERSITY EXAMINATIONS


Anna University Examination May/June 2012
Important Questions

Common To
IT41:Software Engineering and Quality Assurance
IT1251A:Software Engineering and Quality Assurance
080250013:Software Engineering and Quality Assurance
142401:Software Engineering and Quality Assurance
10144IT406:Software Engineering and Quality Assurance

                                                          Unit I

1.   Explain in detail about the Process Iteration.
2.   Explain in detail about the software life cycle model with various phases
3.   Explain in Detail About the RAD model  and incremental model
4.   Explain in detail about the Component based Software Engineering

Unit II

1.   Explain in detail about the Software Prototyping? Explain the various techniques used in Software Prototyping
2.   What is data modeling? Draw the ER diagram and  Identify the data objects with attributes used in Employee Information systems.
3.   Describe the structure of software requirements specification documents explaining clearly the standards to be followed
4.   Explain Requirement Engineering process in detail


Unit III

1.   Explain cohesion and coupling in with necessary diagrams.
2.   Explain in detail the design concepts.
3.   Explain the design steps of the transform mapping
4.   How you do some effective modular design List out the design heuristics

Unit IV

1.   Explain in detail about system testing
2.   Explain the various types of black-box testing methods.
3.   Explain in detail about the different integration testing approaches
4.   Write a procedure to find the sum of Fibonacci series up to N. find cyclomatic complexity.  Derive all possible test cases.

Unit V
1.   What are the tasks in SCM process? Explain each of them in detail
2.   Write notes on ISO 9000 quality standards
3.   What are direct and indirect measures? Explain size-oriented metrics in detail.
4.   Explain in detail about the process improvement

ELECTROMAGNETIC FIELDS EMF IMPORTANT QUESTION FOR MAY/JUNE 2012 ANNA UNIVERSITY EXAMINATIONS


Anna University Examination May/June 2012
Important Questions

Common To

EC43:Electromagnetic Fields
EC1253  Electromagnetic Fields
080290021:Electromagnetic Fields
147403:Electromagnetic Fields
10144EC404:Electromagnetic Fields

Note: These are only Important questions , These Question May Or May Not be Asked for University Examination

Unit I

1.Derive the expression for electric Field on the axis  at a point h m of a uniformly charged 
circular disc  of radius a m with a charge density of ρs c/m2
2. Find the electric field intensity of a straight uniformly charged wire of length ‘L’m
and having a linear charge density of +ρ C/m at any point at a distance of ‘h’ m
3. State and Prove Gauss’s law. List the limitations of Gauss’s law.
4. Find the magnetic field density at appoint on the axis of a circular loop of a radius b that carries a current I
5 Explain coulomb’s Law .three equal positive charges of 4X 10-9 coulomb each are located at three corners of a square ,side 20cm.determine the electric field intensity at the vacant corner  point of the square.

Unit II

1.Circular disc of radius ‘a’ is uniformly charged with a charge density of s  c/m2.  Find the electric field intensity at a point ‘h’ from the disc along its central axis
2. Derive an expression for magnetic field strength, H, due to a current carrying conductor of finite length placed along the y- axis, at a point P in x-z plane and ‘r’ distant from the origin.
3. Derive the expression for the E at a point P due to an electric dipole.
4. Find the magnetic field intensity at the centre O of a square loop of sides equal to 5M and carrying 10A of current

Unit III

1.Solve the laplace’s equation for the potential field in the hompogenous region between the  two concentric conducting spheres with radius ‘a’ and ‘b’ where b>a V=0 at r = b and V =V0 at r=a .find the capacitance between the two concentric spheres.
 2.Determine the inductance of a solenoid of 2500 turns wound uniformly over a length of  0.25m on a cylindrical paper tube , 4 cm in diameter .the medium is air
3. A cylindrical capacitor consists of an inner conductor of radius a and an outer conductor of  radius b. The space between the conductors filled with a dielectric whose permittivity ε, the length of the capacitor is L. Determine the capacitance
4.Derive an expression for the inductance of solenoid
5.Show that the  inductance of the cable L = µl/2π (ln b/a) H.
6.Derive an expression for  the capacitance of  a spherical capacitor with conducting shells of radius a and b.


Unit IV


1.Solve one dimensional  Laplace’s equation to obtain the field inside a  parallel plate capacitor and also find the surface charge density at two plates
2.State and prove Poynting theorem.
3.Derive  Maxwell’s  equation  derived  from  Faraday’s  law  both  in Integral and point forms
4. Three capacitors of 10,25 and 50 microfarads are connected in series and parallel. Find the equivalent capacitance and energy stored in each case ,when the combination is connected across a 500 V supply
5.Derive  modified  form  of  Ampere’s  circuital  law  in  Integral  and differential forms
 Unit V

1.Derive the expression for the reflection by a perfect dielectric –normal incidence
2.Obtain the wave equation for a  conducting medium
3.Derive the wave equation starting form Maxwell’s equation for free space For good dielectrics derive the expressions for α, β, ν and η.
4. Find α, β, ν and η. for Ferrite at 10GHz  εr = 9, μr = 4, σ = 10 ms/m




DIGITAL LOGIC CIRCUITS IMPORTANT QUESTIONS FOR MAY/JUNE 2012 ANNA UNIVERSITY EXAMINATIONS


Anna University Examination May/June 2012
Important Questions

Common To

EE46:Digital Logic Circuits
EC1261A  Digital Logic Circuits
080280029:Digital Logic Circuits
131405:Digital Logic Circuits   
10133EE406A:Digital Logic Circuits

Note: These are only Important questions , These Question May Or May Not be Asked for University Examination


Unit I
1.   Obtain the minimum SOP using Quine McCluskey’s method and verify using K – Map.
F = m0 + m2 + m4 + m8 + m9 + m10 + m11+ m12 + m13

2.   Determine the prime implicants of the following function using tabulation method and verify using K –Map. F = (A,B,C,D) = ∑ (3,4,5,7,9,13,14,15)
3.   Design a Binary to BCD code converter and BCD to Excess -3 code converter.
4.   Reduce the given expressions using Boolean algebra:
(1) x’y’z’ + x’y’z + x’yz + xy’z + xyz
(2) p’q’r + p’qr’ + p’qr + pqr’ + pq’r’
5. Design a decimal adder to add two decimal digits.

Unit II

1.   Design a asynchronous decade counter using JK flipflop.
2.   Design a 8 X1 Mux using 2 X1 multiplexers.
3.   Design a synchronous counter using JK flipflop in the sequence 7,4,3,1,5,0,7….
4.   Draw and explain the block diagram of Mealy circuit
5.   Design a MOD -5 synchronous counter using JK flip-flops .Draw a timing diagram.
6.   Design a 2 bit Magnitude Comparator.
Unit III

1.   Describe the steps involved in design of asynchronous sequential circuit in detail with an example.
2.   Explain the working of a 3 – input TTL totem-pole NAND gate.
3.   Explain the concept and implementation of ECL logic family.
4.   Explain In detail about FPGA.
5.   A combinational circuit is defined by the functions .
            F1 (A,B,C ) =∑ (3,5,6,7)
      F2 (A,B,C ) =∑ (0,2,4,7).Implement the circuit with PLA


Unit IV
1.   Design an asynchronous sequential circuit  that has two inputs X2 and X1 and one output Z. When
 X1 = 0, that output Z is 0. The first change in X2 that occurs while X1 is 1 will cause output Z to be 1. The output Z will remain 1 until X1 returns to 0.

2.   An asynchronous sequential circuit has two internal states and one output. The excitation and
output functions describing the circuit are
Y1 = x1x2 + x1 y’2 + x’2y1
Y2 = x2 + x1 y’1y2 + x’1y1
Z = x2 + y1

a)   Draw the logic diagram of the circuit.
b)   Derive the transition table and output map.
c)   Obtain a flow table for the circuit.

3.   The Circuit  has two inputs T (toggle) and C (clock) and one output Q. The output state is complemented if T=1 and clock C changes from 1 to 0  otherwise, under any other input condition, the output Q remains unchanged. Derive the primitive flow table and implication table and the logic diagram.

4. Draw the State diagram and obtain the primitive flow table for a circuit with two inputs X1 and X2 and two outputs Z1 and Z2 that satisfies the following conditions.   

1) When X1 X2   =00, output Z1 Z2 =00.
2) When X1 = 1 and X2 change from 0 to 1, the output   Z1 Z2 =01.
3) When X2 = 1 and X1 change from 0 to 1, output Z1 Z2 =10.
4) Otherwise output does not change.

5.   Implement the following Boolean functions with a PLA.
              F1 (A, B, C) = ∑ (0, 1, 2, 4)
              F2 (A, B, C) = ∑ (0, 5, 6, 7)
              F3 (A, B, C) = ∑ (0, 3, 5, 7)

Unit V

1.   Write VHDL program for 4x1 multiplexer.
2.   Explain in detail the design procedure for register transfer language.
3.   Write an HDL behavioral description of JK flip-flop using if-else statement based on the value of present state.
4.   Write VHDL program for 4-bit ripple counter.
5.   Explain the design procedure of RTL using VHDL