EE6301 Digital Logic Circuits Syllabus Notes Question Papers 2 Marks with Answers Question Bank with answers Anna University EE6301 DLC Notes Syllabus 2 Marks with answers EEE 3rd Semester - Regulation 2013 3rd Semester Syllabus Notes

Anna University EE6301 Digital Logic Circuits Notes Syllabus 2 marks with answers Part A Question Bank with answers Key - EEE 3rd Semester

Anna University EE6301 Digital Logic Circuits Syllabus Notes 2 marks with answer is provided below. EE6301 Notes Syllabus all 5 units notes are uploaded here. here EE6301 DLC Syllabus notes download link is provided and students can download the EE6301 Syllabus and Lecture Notes and can make use of it.

EE6301 DIGITAL LOGIC CIRCUITS SYLLABUS REGULATION 2013

UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES
Review of number systems, binary codes, error detection and correction codes (Parity and Hamming code0- Digital Logic Families ,comparison of RTL, DTL, TTL, ECL and MOS families -operation, characteristics of digital logic family.

UNIT II COMBINATIONAL CIRCUITS
Combinational logic - representation of logic functions-SOP and POS forms, K-map representationsminimization using K maps - simplification and implementation of combinational logic - multiplexers and demultiplexers - code converters, adders, subtractors.

UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS
Sequential logic- SR, JK, D and T flip flops - level triggering and edge triggering - counters - asynchronous and synchronous type - Modulo counters - Shift registers -design of synchronous sequential circuits - Moore and Melay models - Counters, state diagram; state reduction; state
assignment.

UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABLE
LOGIC DEVICES
Asynchronous sequential logic circuits-Transition table, flow table-race conditions, hazards &errors in digital circuits; analysis of asynchronous sequential logic circuits-introduction to Programmable Logic Devices: PROM – PLA –PAL.

UNIT V VHDL
RTL Design – combinational logic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: adders, counters, flipflops, FSM,
Multiplexers /Demultiplexers).

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