Review of number systems, binary codes, error detection and correction codes (Parity and Hamming code0- Digital Logic Families ,comparison of RTL, DTL, TTL, ECL and MOS families -operation, characteristics of digital logic family.
Combinational logic - representation of logic functions-SOP and POS forms, K-map representationsminimization using K maps - simplification and implementation of combinational logic - multiplexers and demultiplexers - code converters, adders, subtractors.
Sequential logic- SR, JK, D and T flip flops - level triggering and edge triggering - counters - asynchronous and synchronous type - Modulo counters - Shift registers -design of synchronous sequential circuits - Moore and Melay models - Counters, state diagram; state reduction; state
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABLE
RTL Design – combinational logic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: adders, counters, flipflops, FSM,
EE6301 DLC Notes - Click here (Notes 2)
EE6301 DLC Notes - Click here (Notes 3)
EE6301 DLC Question Bank(QB2) - Click here
EE6301 DLC Question Bank(QB3) - Click here
EE6301 DLC Nov Dec 2014 Question Papers - Click here (NEW)